| Sumario |
| | Título / Autor(es) | Página(s) |
| | Embedded Computer Systems: Architectures, Modeling, and Simulation - 7th International Workshop, SAMOS 2007 . Samos, Greece, July 16-19, 2007 . Proceedings / Vassiliadis, Stamatis / Berekovic, Mladen / Hämäläinen, Timo D | |
| | Keynotes - Software Is the Answer But What Is the Question? / Anderson, Willie | 1 |
| | Keynotes - Integrating VLIW Processors with a Network on Chip / Huisken, Jos | 2 |
| | System Modeling and Simulation - Communication Architecture Simulation on the Virtual Synchronization Framework / Oh, Taewook / Yi, Youngmin / Ha, Soonhoi | 3-12 |
| | System Modeling and Simulation - A Model-Driven Automatically-Retargetable Debug Tool for Embedded Systems / Schultz, Max R de O / Mendonça, Alexandre K I / Carvalho, Felipe G / Furtado, Olinto J V / Santos, Luiz C V | 13-23 |
| | System Modeling and Simulation - Performance Evaluation of Memory Management Configurations in Linux for an OS-Level Design Space Exploration / Park, Sangsoo / Shin, Heonshik | 24-33 |
| | System Modeling and Simulation - SC2SCFL: Automated SystemC to SystemCFL Translation / Man, Ka Lok / Fedeli, Andrea / Mercaldi, Michele / Boubekeur, Menouer / Schellekens, Michel | 34-45 |
| | VLSI Architectures - Model and Validation of Block Cleaning Cost for Flash Memory / Baek, Seungjae / Choi, Jongmoo / Lee, Donghee / Noh, Sam H | 46-54 |
| | VLSI Architectures - VLSI Architecture for MRF Based Stereo Matching / Park, Sungchan / Chen, Chao / Jeong, Hong | 55-64 |
| | VLSI Architectures - Low-Power Twiddle Factor Unit for FFT Computation / Pitkänen, Teemu / Partanen, Tero / Takala, Jarmo | 65-74 |
| | VLSI Architectures - Trade-Offs Between Voltage Scaling and Processor Shutdown for Low-Energy Embedded Multiprocessors / Langen, Pepijn de / Juurlink, Ben | 75-85 |
| | Scheduling
Programming Models - An Automatically-Retargetable Time-Constraint-Driven Instruction Scheduler for Post-compiling Optimization of Embedded Code / Carlomagno, José O / Santos, Luiz F P / Santos, Luiz C V dos | 86-95 |
| | Scheduling
Programming Models - Improving TriMedia Cache Performance by Profile Guided Code Reordering / Esser, Norbert / Sundararajan, Renga / Trescher, Joachim | 96-106 |
| | Scheduling
Programming Models - A Streaming Machine Description and Programming Model / Carpenter, Paul / Rodenas, David / Martorell, Xavier / Ramirez, Alex / Ayguadé, Eduard | 107-116 |
| | Multi-processor Architectures - Mapping and Performance Evaluation for Heterogeneous MP-SoCs Via Packing / Ristau, Bastian / Fettweis, Gerhard | 117-126 |
| | Multi-processor Architectures - Strategies for Compiling mTC to Novel Chip Multiprocessors / Bernard, Thomas A M / Jesshope, Chris R / Knijnenburg, Peter M W | 127-138 |
| | Multi-processor Architectures - Image Quantisation On A Massively Parallel EmbeddedProcessor / Jacobs, Jan / Engelen, Leroy van / Kuper, Jan / Smit, Gerard J M | 139-148 |
| | Multi-processor Architectures - Stream Image Processing on a Dual-Core Embedded System / Benjamin, Michael G / Kaeli, David | 149-158 |
| | Reconfigurable Architectures - MORA: A New Coarse-Grain Reconfigurable Array for High Throughput Multimedia Processing / Lanuzza, Marco / Perri, Stefania / Corsonello, Pasquale | 159-168 |
| | Reconfigurable Architectures - FPGA Design Methodology for a Wavelet-Based Scalable Video Decoder / Eeckhaut, Hendrik / Devos, Harald / Faes, Philippe / Christiaens, Mark / Stroobandt, Dirk | 169-178 |
| | Reconfigurable Architectures - Evaluating Large System-on-Chip on Multi-FPGA Platform / Kulmala, Ari / Salminen, Erno / Hämäläinen, Timo D | 179-189 |
| | Design Space Exploration - Efficiency Measures for Multimedia SOCs / Jeschke, Hartwig | 190-199 |
| | Design Space Exploration - On-Chip Bus Modeling for Power and Performance Estimation / Lee, Je-Hoon / Cho, Young-Shin / Kim, Seok-Man / Cho, Kyoung-Rok | 200-210 |
| | Design Space Exploration - A Framework Introducing Model Reversibility in SoC Design Space Exploration / Biest, Alexis Vander / Richard, Alienor / Milojevic, Dragomir / Robert, Frederic | 211-221 |
| | Design Space Exploration - Towards Multi-application Workload Modeling in Sesame for System-Level Design Space Exploration / Thompson, Mark / Pimentel, Andy D | 222-232 |
| | Processor Components - Resource Conflict Detection in Simulation of Function Unit Pipelines / Jääskeläinen, Pekka / Guzma, Vladimír / Takala, Jarmo | 233-240 |
| | Processor Components - A Modular Coprocessor Architecture for Embedded Real-Time Image and Video Signal Processing / Flatt, Holger / Hesselbarth, Sebastian / Flügel, Sebastian / Pirsch, Peter | 241-250 |
| | Processor Components - High-Bandwidth Address Generation Unit / Calderón, Humberto / Galuzzi, Carlo / Gaydadjiev, Georgi / Vassiliadis, Stamatis | 251-262 |
| | Processor Components - An IP Core for Embedded Java Systems / Uhrig, Sascha / Mische, Jörg / Ungerer, Theo | 263-272 |
| | Embedded Processors - Parallel Memory Architecture for TTA Processor / Tanskanen, Jarno K / Pitkänen, Teemu / Mäkinen, Risto / Takala, Jarmo | 273-282 |
| | Embedded Processors - A Linear Complexity Algorithm for the Generation of Multiple Input Single Output Instructions of Variable Size / Galuzzi, Carlo / Bertels, Koen / Vassiliadis, Stamatis | 283-293 |
| | Embedded Processors - Automated Power Gating of Registers Using CoDeL and FSM Branch Prediction / Agarwal, Nainesh / Dimopoulos, Nikitas J | 294-303 |
| | Embedded Processors - A Study of Energy Saving in Customizable Processors / Bonzini, Paolo / Harmanci, Dilek / Pozzi, Laura | 304-312 |
| | SoC for SDR - Trends in Low Power Handset Software Defined Radio / Glossner, John / Iancu, Daniel / Moudgill, Mayan / Schulte, Michael / Vassiliadis, Stamatis | 313-321 |
| | SoC for SDR - Design of a Low Power Pre-synchronization ASIP for Multimode SDR Terminals / Schuster, Thomas / Bougard, Bruno / Raghavan, Praveen / Priewasser, Robert / Novo, David / Perre, Liesbet Van der / Catthoor, Francky | 322-332 |
| | SoC for SDR - Area Efficient Fully Programmable Baseband Processors / Nilsson, Anders / Liu, Dake | 333-342 |
| | SoC for SDR - The Next Generation Challenge for Software Defined Radio / Woh, Mark / Seo, Sangwon / Lee, Hyunseok / Lin, Yuan / Mahlke, Scott / Mudge, Trevor / Chakrabarti, Chaitali / Flautner, Krisztian | 343-354 |
| | SoC for SDR - Design Methodology for Software Radio Systems / Lee, Chia-han / Wolf, Wayne | 355-364 |
| | SoC for SDR - Power Efficient Co-simulation Framework for a Wireless Application Using Platform Based SoC / Batsuuri, Tseesuren / Lee, Je-Hoon / Cho, Kyoung-Rok | 365-374 |
| | SoC for SDR - A Comparative Study of Different FFT Architectures for Software Defined Radio / Mittal, Shashank / Khan, Md Zafar Ali / Srinivas, M B | 375-384 |
| | Wireless Sensors - Design of 100 mW Wireless Sensor Nodes on Energy Scavengers for Biomedical Monitoring / Yseboodt, Lennart / Nil, Michael De / Huisken, Jos / Berekovic, Miaden / Zhao, Qin / Bouwens, Frank / Meerbergen, Jef Van | 385-395 |
| | Wireless Sensors - Tool-Aided Design and Implementation of Indoor Surveillance Wireless Sensor Network / Kuorilehto, Mauri / Suhonen, Jukka / Hännikäinen, Marko / Hämäläinen, Timo D | 396-407 |
| | Wireless Sensors - System Architecture Modeling of an UWB Receiver for Wireless Sensor Network / Lecointre, Aubin / Dragomirescu, Daniela / Plana, Robert | 408-420 |
| | Wireless Sensors - An Embedded Platform with Duty-Cycled Radio and Processing Subsystems for Wireless Sensor Networks / Jin, Zhong-Yi / Schurgers, Curt / Gupta, Rajesh | 421-430 |
| | Wireless Sensors - SensorOS: A New Operating System for Time Critical WSN Applications / Kuorilehto, Mauri / Alho, Timo / Hännikäinen, Marko / Hämäläinen, Timo D | 431-442 |
| | Wireless Sensors - Review of Hardware Architectures for Advanced Encryption Ständard Implementations Considering Wireless Sensor Networks / Hämäläinen, Panu / Hännikäinen, Marko / Hämäläinen, Timo D | 443-453 |
| | Wireless Sensors - k+ Neigh: An Energy Efficient Topology Control for Wireless Sensor Networks / Son, Dong-Min / Ko, Young-Bae | 454-464 |
| | Author Index / | 465 |